1. Field of the Invention
The present invention relates to a radio frequency power amplifier suitable for power amplification of a radio frequency signal, which includes a plurality of stages of transistors.
2. Description of the Background Art
A radio frequency power amplifier used for wireless communication is desired to be designed to have a low distortion and a high efficiency. In many communication systems, a quadrature modulation system is used to improve the communication speed, and a communication signal is processed with amplitude modulation in addition to phase modulation in order to suppress frequency dispersion of the modulated signal. Therefore, as a radio frequency power amplifier, a linear amplifier capable of reproducing the amplitude modulation performed on an input signal with high fidelity is used.
In the GMSK (Gaussian filtered Minimum Shift Keying) modulation used for GSM (Global System for Mobile Communications), a modulated signal is formed by a phase change between two values, i.e., a positive value and a negative value, and so has no amplitude component. Therefore, a radio frequency power amplifier used for the GSM system does not need to reproduce power amplification. As such a radio frequency power amplifier, either a linear or a non-linear amplifier is usable. In general, a non-linear amplifier capable of providing a high efficiency is used. In this manner, different types of radio frequency power amplifiers are used for wireless communication in accordance with the modulation system used.
As is well known, the efficiency of a radio frequency power amplifier can be improved by increasing the gain compression amount, and can be further improved by matching the harmonic frequency. However, the optimum condition for improving the efficiency effectively varies depending on the control method of an output power of the radio frequency power amplifier or on whether the radio frequency power amplifier is a linear amplifier or a non-linear amplifier.
For example, non-patent document 1 (Inoue, et al., “Analysis of Class-F and Inverse Class-F Amplifiers”, Technical Report of IEICE, ED2000-231, MW2000-180, ICD2000-191 (2001-01)) reports that the efficiency at the time of high gain compression is higher in an inverse class-F amplifier, in which the second harmonic is open and the third harmonic is shortcircuited, than in a class-F amplifier, in which the second harmonic is shortcircuited and the third harmonic is open. Non-patent document 2 (“The Efficiency of Class-F and Inverse Class-F Amplifiers”, IEICE Electronic Society (C-10-13) 2004) reports that the efficiency at the time of 1 dB gain compression is higher in an inverse class-F amplifier than in a class-F amplifier when the magnitude of the idle current is large, and is higher in a class-F amplifier than in an inverse class-F amplifier when the magnitude of the idle current is small. In this manner, with radio frequency power amplifiers, the efficiency can be improved by optimally adjusting the matching condition for harmonics in accordance with the communication system.
In the GSM system, a highly efficient non-linear radio frequency power amplifier is used, and two methods are used for controlling the output power thereof. According to a first method, the base voltage of the transistor is controlled to vary the power gain and thus to adjust the output power. According to a second method, the collector voltage of the transistor is controlled to vary the power gain and thus to adjust the output power.
According to the first method, the output power is logarithmically varied with respect to the base. voltage. Therefore, the sensitivity of the output power with respect to the base voltage is increased, which makes it difficult to control the output power. According to the second method, the output power is varied in a linear function manner with respect to the collector voltage. Therefore, it is easy to control the output power.
FIG. 9 shows an exemplary basic circuit configuration of a radio frequency power amplifier 101 using the second method.
The radio frequency power amplifier 101 includes two transistors 102 and 103 connected in a plurality of stages in order to increase the power gain. Usually, the latter-stage transistor 103, which amplifies a higher level of power, has a larger size. Therefore, the latter-stage transistor 103 has a larger parasitic capacitance or the like than the former-stage transistor 102, and has a lower impedance than the former-stage transistor 102. For these reasons, when a plurality of transistors are connected in a plurality of stages, an inter-stage matching circuit 104 is provided in order to match the impedance between the collector of the former-stage transistor 102 and the base of the latter-stage transistor 103.
As a configuration of the inter-stage matching circuit 104, either a high-pass filter type shown in FIG. 10 which includes a grounded inductor Lp and a capacitor Cs connected thereto in series, or a low-pass filter type shown in FIG. 11 which includes a grounded capacitor Cp and an inductor Ls connected thereto in series, is used. In addition to matching the impedance, the inter-stage matching circuit 104 needs to supply a bias to the collector of the former-stage transistor 102 and to the base of the latter-stage transistor 103, and also needs to separate the DC components of these bias voltages.
Therefore, when using a low-pass filter type configuration, the inter-stage matching circuit 104 needs to additionally include an impedance conversion device such as a transmission line for supplying a bias, a inductor or the like in order to separate a radio frequency signal and a DC power supply for driving the transistors from each other. The inter-stage matching circuit 104 also needs to have a capacitor connected in series in order to separate the collector of the former-stage transistor 102 and the base of the latter-stage transistor 103 from each other. As a result, the circuit scale is enlarged.
When using a high-pass filter type configuration, the inter-stage matching circuit 104 can supply a bias by grounding the inductor Lp via the capacitor, and separate the bias voltages by the capacitor Cs connected in series. Therefore, the impedance conversion device is not necessary, which allows the circuit to be designed to be compact. For this reason, a high-pass filter type configuration is usually preferred. FIG. 12 shows an exemplary conventional radio frequency power amplifier 101 using the high-pass filter type inter-stage matching circuit 104. In FIG. 12, an inductor L1 (=Lp) is grounded via a capacitor C1, and a capacitor C2 (=Cs) separates the collector of the former-stage transistor 102 and the base of the latter-stage transistor 103 from each other in a DC manner.
However, the inter-stage matching circuit 104 having the high-pass filter type configuration has a characteristic of passing most of the harmonic signal due to a small reflection therein of the harmonic signal. Hence, the impedance matching of the harmonic signal is not performed by the inter-stage matching circuit 104. The harmonic load impedance characteristic of the former-stage transistor 102 becomes equal to the harmonic load impedance characteristic of the latter-stage transistor 103. As a result, the impedance of the harmonic signal is of the low level as the impedance of the latter-stage transistor 103, and the impedance of the fundamental signal is of the high level as the impedance of the former-stage transistor 102.
FIG. 13 shows the output power vs. efficiency characteristics of the former-stage transistor 102 in the conventional radio frequency power amplifier 101 using the high-pass filter type inter-stage matching circuit 104. The dashed line represents the relationship between the output power and the efficiency when the base voltage is controlled. The solid line represents the relationship between the output power and the efficiency when the collector voltage is controlled. As shown in FIG. 13, the efficiency is gradually reduced when the base voltage is controlled. When the collector voltage is controlled, there is a region in which the efficiency is rapidly reduced. The cause of this phenomenon will be described with reference to FIG. 14 and FIG. 15.
FIG. 14 shows the input power vs. output power characteristics of the conventional radio frequency power amplifier 101 using the high-pass filter type inter-stage matching circuit 104. In FIG. 14, the horizontal axis represents the input power, and the vertical axis represents the output power. A plurality of characteristic lines V1 through V6 respectively represent the input vs. output characteristics, which are the characteristics of the output power with respect to the input power to the radio frequency power amplifier, at a plurality of collector voltages. The characteristic line V1 represents the characteristic at the highest collector voltage, and the collector voltage is gradually reduced in the order of the characteristic line V2, V3, V4, V5 and V6. With the method of controlling the collector voltage, the input power of a transmission signal which is input to the radio frequency power amplifier 101 is constant. The output power is adjusted along the dashed line by adjusting the collector voltage. It is confirmed that the input vs. output characteristics are in an excessive gain compressed state in a region where the collector voltage is low.
FIG. 15 shows the input power vs. efficiency characteristics of the former-stage transistor 102 in the conventional radio frequency power amplifier 101 using the high-pass filter type inter-stage matching circuit 104. In FIG. 15, the horizontal axis represents the input power, and the vertical axis represents the efficiency of the former-stage transistor 102. A plurality of characteristic lines V1 through V4 respectively represents the efficiencies with respect to the input power at a plurality of collector voltages. The characteristic line V1 represents the efficiency at the highest collector voltage, and the collector voltage is gradually reduced in the order of the characteristic line V2, V3 and V4.
It is confirmed by FIG. 15 that as the input power is increased, the efficiency is rapidly reduced due to the excessive gain compressed state of the input vs. output characteristics shown in FIG. 14. In the case where such a characteristic is exhibited, when the collector voltage is controlled while the input power is fixed to the value of the dashed line, the efficiency is rapidly reduced as shown in FIG. 13.